Fair computational tree logic
Fair computational tree logic is conventional computational tree logic studied with explicit fairness constraints.
Weak fairness / justice
This declares conditions such as all processes are executing infinitely often. If you consider the processes to be Pi, then the condition becomes:
Strong fairness / compassion
Here, if a process is requesting a resource infinitely often (R), it should be allowed to get the resource (C) infinitely often:
Model checking for fair CTL
If you consider a Kripke Model, the fair Kripke Model has a set of States F. A path is considered a fair path, if and
only if the path includes all members of F infinitely often.
Fair CTL model checking restricts the checks to only fair paths. There are two kinds:
- 1. Mf,si |= A if and only if holds in ALL fair paths.
- 2. Mf,si |= E if and only if holds in one or more fair paths.
A fair state is one from which at least one fair path originates. This translates to Mf,s |= EGtrue.
SCC-based approach
The strongly connected component (SCC) of a directed graph is a maximally connected graph - all the nodes are reachable from each other. A fair SCC is one that has an edge into at least one node for each of the fair conditions.
To check for fair EG for any formula,
- Compute what is called the denotation of the formula. Basically all the states such that M, s |= formula.
- restrict the model to the denotation.
- Find the fair SCC.
- Obtain the union of all 3(above).
- Compute the states that can reach the union.
Emerson Lei algorithm
The fix point characterization of Exist Globally is given by: [EGφ] = νZ .([φ] ∩ [EXZ ]), which is basically the limit applied according to Kleene's theorem. To fair paths, it becomes [Ef Gφ] = νZ .([φ] ∩Fi ∈FT [EX[E(Z U(Z ∧ Fi ))]) which means the formula holds in the current state and the next states and the next to next states until it meets all the members of the fair conditions. This means that, the condition is equivalent to a sort of accepting point where the accepting condition is the entire set of Fair conditions.
References
- Emerson, E. A.; Halpern, J. Y. (1985). "Decision procedures and expressiveness in the temporal logic of branching time". Journal of Computer and System Sciences. 30 (1): 1–24. doi:10.1016/0022-0000(85)90001-7.
- Clarke, E. M.; Emerson, E. A. & Sistla, A. P. (1986). "Automatic verification of finite-state concurrent systems using temporal logic specifications". ACM Transactions on Programming Languages and Systems. 8 (2): 244–263. doi:10.1145/5397.5399.