Computer architecture simulator

A computer architecture simulator, or an architectural simulator, is a piece of software to model computer devices (or components) to predict outputs and performance metrics on a given input. An architectural simulator can model a target microprocessor only (see instruction set simulator), or an entire computer system (see full system simulator) including a processor, a memory system, and I/O devices.

A full-system simulator is an architecture simulator that simulates an electronic system at such a level of detail that complete software stacks from real systems can run on the simulator without any modification. A full system simulator effectively provides virtual hardware that is independent of the nature of the host computer. The full-system model typically has to include processor cores, peripheral devices, memories, interconnection buses, and network connections.

The defining property of full-system simulation compared to an instruction set simulator is that the model allows real device drivers and operating systems to be run, not just single programs. Thus, full-system simulation makes it possible to simulate individual computers and networked computer nodes with all their software, from network device drivers to operating systems, network stacks, middleware, servers, and application programs.

A cycle-accurate simulator is a computer program that simulates a microarchitecture on a cycle-by-cycle basis. In contrast an instruction set simulator simulates an instruction set architecture usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precisions are very important from legacy reasons. More often CAS is used when designing new microprocessors – they can be tested, and benchmarked accurately (including running full operating system, or compilers) without actually building a physical chip, and easily change design many times to meet expected plan.

Cycle-accurate simulators must ensure that all operations are executed in the proper virtual (or real if it is possible) time – branch prediction, cache misses, fetches, pipeline stalls, thread context switching, and many other subtle aspects of microprocessors.

Categories

Computer architecture simulators can be classified into many different categories depending on the context.

Microarchitecture Simulation is a technique for modeling the design and behavior of a microprocessor and its components.

Full system simulation consist in the simulation of a complete computer system able to execute unmodified programs (it is this thus execution-driven). Such simulators are called emulator, in particular when they imitate existing (or discontinued) hardware instead of under development hardware.

Instruction Set Simulator and Cycle Accurate Simulator are simulators whose scope is the simulation of a sole microprocessor. They diverge in the level of details that they provide. Instruction set simulators focus on the fast simulation of the processor functions while cycle accurate simulators aim at allowing accurate timings of the processor.

Benefits of simulators

Architectural simulators are very useful for the following purposes:

Full system simulation can speed the system development process by making it easier to detect, recreate and repair flaws.[1] The use of multi-core processors is driving the need for full system simulation, because it can be extremely difficult and time-consuming to recreate and debug errors without the controlled environment provided by virtual hardware.[2] This also allows the software development to take place before the hardware is ready,[3] thus helping to validate design decisions.

Implementations

Some popular architectural simulators include:

See also

References

  1. ↑ Peter Magnusson (2004). "Full System Simulation: Software Development's Missing Link".
  2. ↑ Debugging and Full System Simulation
  3. ↑ Vania Joloboff (2009). "Full System Simulation of Embedded Systems" (PDF).
  4. ↑ http://www.modha.org/blog/SC12/SC2012_Compass.pdf
  5. ↑ Jan Van Campenhout, Peter Verplaetse, Henk Neefs. "ESCAPE: environment for the simulation of computer architectures for the purpose of education". doi: 10.1145/1275182.1275191. doi: 10.1.1.134.67. 1998.
  6. ↑ Frederik Habils, Peter Verplaetse, Jan Van Campenhout. "Using ESCAPE: Environment for the Simulation of Computer Architectures for the Purpose of Education". 1999.
  7. ↑ "Environment for the Simulation of Computer Architectures for the Purpose of Education". executable and source files.
  8. ↑ "Computer Architecture Simulation & Visualisation".
  9. ↑ MARSSx86 - Micro-ARchitectural and System Simulator for x86-based Systems
  10. ↑ Almasri, I., Abandah, G., Shhadeh, A., & Shahrour, A. (2011, December). Universal ISA simulator with soft processor FPGA implementation. In Applied Electrical Engineering and Computing Technologies (AEECT), 2011 IEEE Jordan Conference on (pp. 1-6). IEEE.

External links

This article is issued from Wikipedia - version of the 10/25/2016. The text is available under the Creative Commons Attribution/Share Alike but additional terms may apply for the media files.