IMPLY gate

INPUT
A   B
OUTPUT
A → B
0 0 1
0 1 1
1 0 0
1 1 1

The IMPLY gate is a digital logic gate that implements a logical conditional.

Symbols

There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic Gate Symbols.

Traditional IMPLY Symbol IEEE IMPLY Symbol

The logic symbol → can be used to denote IMPLY in algebraic expressions.

Implementations

IMPLY gate implemented by two memristors

IMPLY gate can be implemented by two memristors.[1]

See also

Wikimedia Commons has media related to IMPLY_gates.

References

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