Jason Cong

Jingsheng Jason Cong (born 1963) is a computer scientist, educator, and serial entrepreneur. He was born in Beijing, China. He received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph. D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. He has been on the faculty in the Computer Science Department at the University of California, Los Angeles (UCLA) since 1990. Currently, he is a Chancellor’s Professor and the director of Center for Domain-Specific Computing (CDSC).

Research Contributions and Commercial Impact

Cong made fundamental contributions to the FPGA synthesis technology. His groundbreaking result in the early 1990s on depth-optimal mapping for lookup-table based FPGAs[1] is a cornerstone of all FPGA logic synthesis tools used today. This result, together with the subsequent works on the cut-enumeration and Boolean matching based methods for FPGA mapping, led to a successful startup company Aplus Design Technologies (1998-2003) founded by Cong. Aplus developed the first commercially available FPGA architecture evaluation tool and physical synthesis tool, which were OEMed by most FPGA companies and distributed to tens of thousands of FPGA designers worldwide. Aplus was acquired by Magma Design Automation in 2003, which is now part of Synopsys.

Cong’s research also made significant impact on high-level synthesis (HLS) for integrated circuits. The decade-long research in 2000s by Cong’s group another UCLA spin-off startup, named AutoESL Design Automation (2006-2011), co-founded by Cong. AutoESL developed most widely used HLS tool for FPGAs[2] and was acquired by Xilinx in 2011. The HLS tool from AutoESL (renamed as Vivado HLS after Xilinx acquisition) allows FPGA designers to use C/C++ software programming languages instead of hardware description languages for FPGA design and implementation. It significantly improves the design productivity and fuels much wider adoption of the FPGA technology, such as using FPGAs as new computing fabrics available to software programmers.

In 2009, Cong led a group of twelve faculty members from UCLA, Rice, Ohio-State, and UC Santa Barbara and won a highly competitive NSF Expeditions in Computing Award on Customizable Domain-Specific Computing (CDSC).[3] This project looks beyond parallelization and focuses on domain-specific customization to achieve drastic power-performance efficiency improvement. It led to multiple innovations on architecture design, compilation, and runtime support for customized computing. This new line of research made considerable influence to the computing industry. In particular, Intel’s $17B acquisition of Altera, the second largest FPGA company worldwide, in 2015 signaled that customizable computing is becoming mainstream. The CDSC project led another new startup cofounded by Cong, named Falcon Computing Solutions, which focuses on enabling FPGA-based customized computing in data centers.

In another dimension, Cong’s pioneering research on interconnect-centric design[4] for integrated circuits plays a significant role in overcoming the timing closure challenge in deep submicron designs in 1990s. His work on VLSI interconnect planning, synthesis, and layout optimization as well as highly scalable multi-level analytical circuit placement are embedded in the core of all physical synthesis tools developed by the EDA industry. The best-known industry adoption example was Magma Design Automation, which was founded in 1997 aiming at achieving timing closure through physical synthesis. Cong served on its Technical Advisory Board since its inception until its IPO, and later as its Chief Technology Advisor from 2003 to 2008. A large body of research results from Cong’s group on interconnect optimization were embodied in the Magma’s physical synthesis tools, which were used by most of the leading semiconductor companies worldwide. Magma was acquired by Synopsys in 2012.

Contributions to Higher Education

Cong is a highly accomplished educator. He has graduated 35 PhD students. Nine of them are now faculty members in major research universities worldwide, including Cornell, Georgia Tech., Peking University, Purdue, SUNY Binghamton, UCLA, UIUC, and UT Austin. One of them is now an IEEE Fellow, six of them got the highly competitive NSF Career Award, and one of them received the ACM SIGDA Outstanding Dissertation Award. Also, four of Dr. Cong’s PhD students were co-founders, together with Dr. Cong, of two startups originated from UCLA (Aplus and AutoESL). Others graduates from his group are key players in various leading companies, such as Amazon, Arista, Bloomberg, Broadcom, Cadence, Facebook, Google, IBM, Intel, Micron, Synopsys, and Xilinx.

Cong served as the Department Chair of the UCLA Computer Science Department from 2005 to 2008.

Selected Awards

Cong was elected to IEEE Fellow in 2000 "for seminal contributions in computer-aided design of integrated circuits, especially in physical design automation, interconnect optimization, and synthesis of FPGAs", and ACM Fellow in 2008 "for contributions to electronic design automation".

He received the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award “For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation”, and also the 2016 IEEE Computer Society Technical Achievement Award ”For setting the algorithmic foundations for high-level synthesis of field programmable gate arrays“. He is the only one who received a Technical Achievement Award from both the IEEE Circuits and Systems Society and the Computer Society.

References

  1. ↑ J. Cong and Y. Ding , "FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs", 1994 IEEE Trans. on Computer-Aided Design.
  2. ↑ J. Cong, B. Liu, S. Neuendorffer, J. Noguera, K. Vissers and Z. Zhang, “High-Level Synthesis for FPGAs: From Prototyping to Deployment”, 2011 IEEE Transactions on Computer-Aided Design.
  3. ↑ www.cdsc.ucla.edu
  4. ↑ J. Cong , "An Interconnect-Centric Design Flow for Nanometer Technologies", Proc. of the IEEE, April 2001.
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